As semiconductor devices become smaller and highly integrated, an area of a cell region in the semiconductor device, which contains patterns, is practically decreased. However, difficulties may occur in attempting to create uniform and dense patterns with fine features due to limitations of the exposure apparatus.
Thus, the recent tendency in fabricating highly integrated semiconductor devices is greatly affected by the development of the photolithographic techniques. An LELE (Litho/Etch/Litho/Etch) double masking technique has been used to form dense patterns with fine features in a limited cell region. However, misalignment and printing defects may occur during the double or repeated masking process. In addition, this conventional technique has difficulty in forming a fine pattern having a critical dimension.
Furthermore, in order to obtain fine patterns, multiple-stacked layers especially mask layers have been recently used, thereby increasing the heights of the whole structure and leading to a high aspect ratio. The high aspect ratio is one of the crucial issues to be avoided in order to form precise structures.
Accordingly, an improved method for forming a fine and precise pattern such as contact holes is required.